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S K Mohapatra
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Profile Information

I am...
Engineer, Teacher
My research field or area of interest innanotechnology
Research interests include modeling and simulation of nanoscale semiconducting devices and its characterization for digital and high frequency applications.
Interest in...
FinFET, Radiation effect in Nanoscale, Advanced CMOS Technology.
Publication list
Mohapatra, S.K., Pradhan, K.P. Singh, D., and Sahu, P.K., "The Role of Geometry Parameters and Fin Aspect Ratio of Sub-20nm SOI-FinFET: An Analysis Towards Analog and RF Circuit Design," Nanotechnology, IEEE Transactions on, vol. 14, no. 3, pp. 546 - 554, 2015.

Pradhan, K.P., Singh, D. Mohapatra, S.K., and Sahu, P.K., "Double material gate oxide (DMGO) SiGe-on-insulator (SGOI) MOSFET: A proposal and analysis," in Electron Devices and Solid-State Circuits (EDSSC), 2015 IEEE International Conference on, 2015, pp. 575 - 577.

Sahu, P.K., Mohapatra, S.K., and Pradhan, K.P., "Zero temperature-coefficient bias point over wide range of temperatures for single- and double-gate UTB-SOI n-MOSFETs with trapped charges," Materials Science in Semiconductor Processing, vol. 31, pp. 175 - 183, 2015.

Mohapatra, S.K., Pradhan, K.P.Artola, L., and Sahu, P.K., "Estimation of analog/RF figures-of-merit using device design engineering in gate stack double gate MOSFET," Materials Science in Semiconductor Processing, vol. 31, pp. 455 - 462, 2015.

Mohapatra, S.K., Pradhan, K.P., and Sahu, P.K., "Temperature dependence inflection point in Ultra-Thin Si directly on Insulator (SDOI) MOSFETs: An influence to key performance metrics," Superlattices and Microstructures, vol. 78, pp. 134 - 143, 2015.

Mohapatra, S.K., Pradhan, K.P.Sahu, P.K.Pati, G.S., and Kumar, M.R., "The effect of interface trapped charges in DMG-S-SOI MOSFET: A perspective study," Advances in Natural Sciences: Nanoscience and Nanotechnology, vol. 5, no. 4, 2014.

Singh, D., Mohapatra, S.K. Pradhan, K.P., and Sahu, P.K., "Variation study of process parameters in Trigate SOI-FinFET," in India Conference (INDICON), 2014 Annual IEEE, 2014, pp. 1 - 4.

Pradhan, K.P., Mohapatra, S.K.Sahu, P.K., and Behera, D.K., "Impact of high-k gate dielectric on analog and RF performance of nanoscale DG-MOSFET," Microelectronics Journal, vol. 45, no. 2, pp. 144 - 151, 2014.

Mohapatra, S.K., Pradhan, K.P., and Sahu, P.K., "Linearity and analog performance analysis in GSDG-MOSFET with gate and channel engineering," in India Conference (INDICON), 2014 Annual IEEE, 2014, pp. 1 - 5.

Sahu, P.K., Mohapatra, S.K., and Pradhan, K.P., "Impact of downscaling on analog/RF performance of sub-100nm GS-DG MOSFET," Informacije MIDEM, vol. 44, no. 2, pp. 119 - 125, 2014.

Singh, D., Panda, S. Mohapatra, S.K. Pradhan, K.P., and Sahu, P.K., "Static performance analysis on UTB-SG and DG MOSFETs with Si and III–V channel materials," in High Performance Computing and Applications (ICHPCA), 2014 International Conference on, 2014, pp. 1 - 6.

Mohapatra, S.K., Pradhan, K.P. Sahu, P.K. Singh, D., and Panda, S., "Ultra-thin Si directly on insulator (SDOI) MOSFETs at 20 nm gate length," in High Performance Computing and Applications (ICHPCA), 2014 International Conference on, 2014, pp. 1 - 4.

Mohapatra, S.K., Pradhan, K.P.Sahu, P.K., and Kumar, M.R., "The performance measure of GS-DG MOSFET: An impact of metal gate work function," Advances in Natural Sciences: Nanoscience and Nanotechnology, vol. 5, no. 2, 2014.

Mohapatra, S.K., Pradhan, K.P., and Sahu, P.K., "Some device design considerations to enhance the performance of DG-MOSFETs," Transactions on Electrical and Electronic Materials, vol. 14, no. 6, pp. 291 - 294, 2013.

Sahu, P.K., Mohapatra, S.K., and Pradhan, K.P., "A study of SCEs and analog FOMs in GS-DG-MOSFET with lateral asymmetric channel doping," Journal of Semiconductor Technology and Science, vol. 13, no. 6, pp. 647 - 654, 2013.

Agarwal, A.P.K., Pradhan, B.K.P. Mohapatra, C.S.K., and Sahu, D.P.K., "Insulating layer parameters are still in reduction of kink," in Engineering (NUiCONE), 2012 Nirma University International Conference on, 2012, pp. 1 - 4.

Mohapatra, S.K., Pradhan, K.P., and Sahu, P.K., "Effect of channel & gate engineering on Double Gate (DG) MOSFET-A comparative study," in Emerging Electronics (ICEE), 2012 International Conference on, 2012, pp. 1 - 3.
Researchgroup, Institute, University, School, Company name
Biju Patnaik University of Technology, Rourkela, Odisha.
Researchgroup, Institute, Company, University, School webpage
http://www.bput.ac.in/
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