Gender
Male
Gender
Male
Location
Bremen, Bremen
Birthday:
January 23
I am...
Engineer, Teacher
My research field or area of interest innanotechnology
Crosstalk Faults
Interest in...
Computer Architecture Test and Diagnosis
Publication list
1) Shehzad Hasan, A. K. Palit, W. Anheier, " Test Pattern Generation and Compaction for Crosstalk Induced Glitches and Delay Faults ", 23rd International Conference on VLSI Design, VLSI 2010, 3rd-7th January 2010, Bangalore, India. 2) A. K. Palit, Shehzad Hasan, W. Anheier, " Decoupled Victim Model for the Analysis of Crosstalk Noise between On-chip Coupled Interconnects ", 11th Electronics Packaging Technology Conference, EPTC 2009, 9th-11th December 2009, Singapore. 3) Shehzad Hasan, A. K. Palit, W. Anheier, " Equivalent Victim Model of the Coupled Interconnects for Simulating Crosstalk Induced Glitches and Delays ", 13th IEEE workshop on Signal Propagation on Interconnects, SPI 2009, 12th-15th May 2009, Strasbourg, France. 4) Shehzad Hasan, A. K. Palit, K.K. Duganapalli, W. Anheier, " Compaction of Test Set for Crosstalk Induced Glitch Faults using Pattern Sequencing ", 21. Workshop für Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, TuZ 2009, 15th-17th February 2009, Bremen, Germany. 5) A. K. Palit, Shehzad Hasan, K.K. Duganapalli, W. Anheier, " Distributed RLGC Transient Model of Coupled Interconnects in DSM Chips for Crosstalk Noise Simulation ", 2nd Electronics Sytem-Integration Technology Conference, ESTC 2008, 1st-4th September 2008, Greenwich, London.
Researchgroup, Institute, University, School, Company name
ITEM, Universität Bremen
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