Engineer, Student, User of nanotechnology products
My research field or area of interest innanotechnology
FinFET,Strained Si MOSFET,Noises in MOSFET
1-"A Simulation Study of 45nm Strained-Si nMOSFET using Low field Arora Mobility Model"-2nd IEEE National Conference on Devices & Circuits,NIST,Berhampur,Odisha,2016 2-"Design & Performance Analysis of Strained-Si NMOSFET using TCAD"-2nd IEEE International Conference on Engineering and Technology (ICETECH),Coimbatore,TN, India,in press,2016.
Researchgroup, Institute, University, School, Company name
Veer Surendra Sai University Of Technology, Burla India
Researchgroup, Institute, Company, University, School webpage
The network creator will send periodical messages to members - you below to allow us to email you