Gender

Male


Location

Ranchi, Jharkhand


Birthday:

June 1


I am...

Engineer, Teacher


My research field or area of interest innanotechnology

VLSI Design, Embedded System Design, Nanobiosensors, Early stage detection of Cancers, Cardiac Pacemakers, Smart chip for auto drive Nano Metro Train, ITLC.


Interest in...

VLSI Design, Embedded System Design, Nanobiosensors, Early stage detection of Cancers, Cardiac Pacemakers, Smart chip for auto drive Nano Metro Train, ITLC.


Publication list

[1] V. Nath, A. Kumar, J.P. Kumar, “Design of High Fan-In Dynamic CMOS Comparators with Low Transistor Count in VLSI” EMCON”09, IEEE Conference Student Chapter, Dept. of EEE, Kalasalingam University, Krishonlock, Tamilnadu, India, 19th-20th Feb-2009. [2] V. Nath V. Ranjan, “Implementation of Switching Techniques for the Sample and Hold Applications in VLSI” IEEE Conference Student Chapter, Dept. of EEE, Kalasalingam University, Krishonlock, Tamilnadu, India, 19th-20th Feb-2009. [3] V. Nath, L.K. Singh, K.S. Yadav, “Design of CMOS Signal Conditioning Circuit for MEMS Sensors in VLSI” International Conference SCI –09, organized by Pentagram Research Centre, Pvt. Ltd., Hyderabad(A.P.), India, 7th to 10th Jan-2009. [4] A. Kumar, J.P. Kumar, V. Nath, “Design a CMOS Gates for Combinational Functional Blocks of Self-checking Circuits and Signal Coding in VLSI” International Conference SCI –09, organized by Pentagram Research Centre, Pvt. Ltd., Hyderabad(A.P.),India, 7th to 10th Jan-2009. [5] S. Priayadarshi, V. Negi, V. Nath, “Design a low power stage CMOS operational amplifier in VLSI” International Conference SCI –09, organized by Pentagram Research Centre, Pvt. Ltd., Hyderabad, (A.P.),India, 7th to 10th Jan-2009. [6] V. Ranjan, V. Nath, “Design of Sigma-Delta Automation Algorithm in VLSI” SCENTIFIC FORESIGHT-08, Krishna Memorial Hall, Patna, India, 21th –22th Dec-2008. [7] V. Nath, L.K. Singh, K.S. Yadav, “Design and Development of a Variable Low Power CMOS PTAT Voltage Reference in VLSI” NASDECC-08, organized by Dept. of ECE, BIT Mesra, Ranchi (JH), India, 6th –7th Nov-2008. [8] A. Kumar, J.P. Kumar, V. Nath, “Design & Development of a Stream Based In-Line A locatable Multiplier for Configurable Computing in VLSI” NASDECC-08, organized by Dept. of ECE, BIT Mesra, Ranchi (JH), India, 6th –7th Nov-2008. [9] A.K. Singh, B. Srivastava, O.M. Singh, M. Mishra, V. Nath, “Design of a Low Power 16-bit 30 M Sample/s Pipeline Analog to Digital Converter Using 0.30 μm CMOS Technology in VLSI” NASDECC-08, organized by Dept. of ECE, BIT Mesra, Ranchi (JH), India, 6th –7th Nov-2008. [10] V. Nath, Aminul Islam, “Design and Development of CMOS Low-Power Digital Systems Based on Adiabatic-Switching Principles in VLSI”, 24th National Convention & National Seminar on Recent Advances in Wireless & Mobile Telecommunications (RAWMTEL-08), organized by The Institution of Engineers (India) and Department of ECE, BIT, Mesra, Jharkhand State Centre, Engineer Bhawan, Nepal Kothi Campus, Doranda, Ranchi, (JH), India, 2008. [11] V. Nath, L.K.Singh, K.S. Yadav, “Design and Development of a Novel CMOS Switched Capacitor Signal Conditioning for Push Pull Type Capacitive Transducers in VLSI” ICSCI-2008, organized by Pentagram Research Centre Pvt. Ltd., Hyderabad(A.P.),India, 2-5th Jan-2008. [12] V. Nath, L.K.Singh, K.S. Yadav, “Design and Development of Smart Double Ring Capacitive Pressure Sensors in VLSI” A Symposium on Contemporary Science & Technology, SCIENTIFICFORESIGHT-07, organized by Department of Science & Technology, Patna, India, 22-24th Dec-2007. [13] V. Nath, L.K.Singh, K.S. Yadav, Ankit Gupta, “Design and Development of Power Supply Noise Attenuation in a PTAT Current Source in VLSI” A symposium on Contemporary Science & Technology, SCIENTIFICFORESIGHT-2007, Department of Science & Technology, Patna, India, 22-24th Dec-2007. [14] V. Nath, L.K.Singh, K.S. Yadav, “Layout Design and Analysis of Intelligence Traffic Light Controller in VLSI using VHDL” ICTES-2007, organized by Dept. of ECE, Dr. MGR, University, Chennai, Tamilnadu, India, 20-22th Dec. 2007. [15] Vijay Nath, L.K. Singh, K.S. Yadav, D. Pal “ Design and Development of CMOS Switched Capacitor Signal Conditioning for push pull Type Capacitive Transducers” All India Seminar on Achievements and Challenges in Electronics and Telecommunication Engineering, organized by The Institutions of Engineers, IEI-Campus Nepal Kothi , Doranda, Ranchi (JH), India, 20-21th Jan-2007. [16] Vijay Nath, L.K. Singh, K.S. Yadav, D.Pal “ Design and Development of a Low Power Advance CMOS VLSI Circuit for Signal Conditioning in Integrated Capacitive Sensors” in International Conference on Advance Communication Systems, organized by Dept. of ECE, Govt. College of Tech, Thadagam Road, Coimbatore-641013, Tamilnadu, India, 10-12th Jan.-2007. [17] Vijay Nath, L.K. Singh, K.S. Yadav, D.Pal “ Design and Development of Advance CMOS Switched in VLSI” All India Seminar on Advances Communication Technique and Networking- Exploring Challenges, organized by Institute of Engineers, (India) Bhilai Local Centre, Indira Place, Bhilai(M.P.), India, 6th -7th Jan-2007. [18] Vijay Nath, L.K. Singh, K.S. Yadav, D.Pal “ Design and Development of CMOS Bandgap Voltage Reference for CMOS Signal conditioning Circuit in VLSI” National Symposium SCIENTIFIC FORESIGHT-2006 , organized by Scientific Foresight Society, IGSC-Planetarium, Patna, India, 23 –24th Dec-2006. [19] Vijay Nath, L.K. Singh, K.S. Yadav, D.Pal “ Design and Development of CMOS Switched Capacitor Signal Conditioning for push pull Type Capacitive Sensors” National Conference on recent Advances in Electronics and Communication Engg., Gurunanak Dev College, Gill Road, Ludhiana(Punjab), India, 9- 10th Nov-2006. [20] Vijay Nath, L.K. Singh, K.S. Yadav, “Design and Development of Double Ring Capacitive Pressure Sensors based on MEMS Technology” in (NASDEC2) National Seminar on Device, Circuit, and Communication, organized by Dept. of ECE, Birla Institute of Technology, Mesra, Ranchi (JH),India, 2-4th Nov-2006. [21] Vijay Nath, L.K. Singh, K.S. Yadav, D. Pal “Design and Development of Bi- CMOS Bandgap Voltage reference of Signal Conditioning Circuit for MEMS sensors Using VLSI Design and Technology” in (NASDEC2) National Seminar on Device, Circuit, and Communication, organized by Dept. of ECE, Birla Institute of Technology, Mesra, Ranchi (JH), India, 2-4th Nov-2006. [22] Vijay Nath, K.S. Yadav, S. Ahmod, L.K. Singh , M. Mishra “ Design and Development of Ring Capacitive Pressure Sensors based on VLSI Technology” National Conference of the ADVANCE MATERIAL SCIENCE , Organized by D.D.U. Gorakhpur , University Gorakhpur-273009(U.P.),India,11-13 March- 2005. [23] Vijay Nath, K.S. Yadav, S. Ahmod, L.K. Singh “ Design and Development of Bi- CMOS Band-gap Voltage Reference of Signal Conditioning Circuit for Ultrasonic Sensors based on MEMS Technology” in 13th National Symposium on ULTRASONICS-2004, organized by Jhansi University (U.P.), India, 21-23 Dec-2004. [24] Vijay Nath, K.S. Yadav, S. Ahmod, L.K. Singh, M. Mishra “ Design and Development of CMOS Signal Conditioning Circuit for MEMS Sensors” in Six Conference of the INTERNATIONAL ACADEMY OF PHYSICAL SCIENCES on Emerging Dimensions of Physical Sciences, organized by D.D.U. Gorakhpur, University Gorakhpur-273009 (U.P.), India, Feb-06-08, 2004. [25] Vijay Nath, M. Suleman, K.S.Yadav, S. Ahmod “ Design and Development of CMOS Operational Amplifier for MEMS Sensors” National Conference on Science and Technology Development “VIVEKA NANDA TECHNO FEISTA-2002” organized by RGEC- Meerut, (U.P.) India, 11-12 Jan-2002. (B) International Journa [26] V. Nath, L. K. Singh, K.S. Yadav, “Design and Development of CMOS Bandgap Voltage Reference Circuit in VLSI” International Journal of Systemics, Cybernetics and Informatics, Vol 2, pp.71-75, April.2007. [27] V. Nath, L. K. Singh, K.S. Yadav, “Layout Design and Analysis of Intelligence Traffic Light Controller in VLSI using VHDL” International Journal of Systemics, Cybernetics and Informatics, Vol.1, pp.31-34, Jan.2008.


Researchgroup, Institute, University, School, Company name

VLSI Design Group, Dept. of ECE, BIT Mesra, Ranchi


Researchgroup, Institute, Company, University, School webpage

https://www.bitmesra.ac.in


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