Today in class I did two activities. First we did a flow chart showing how we go from a pile of sand to a silicon wafer. The second activity was a CMOS sandwich which is shown in the picture. I used the image from figures 3.22 and 3.23 in "Semiconductor Manufacturing Technology" by Michael Quirk as a guide and the students made CMOS sandwiches according to the following guidelines:

1. Bread is the silicon substrate.
2. Ketchup is P-doped silicon
3. Mustard is N-doped silicon
4. Cheese is oxide
5. Meat is metal or polysilicon

They need to remember to put the gate oxide under the gate polysilicon where it contacts the silicon substrate. Also we forgot to put in the interlayer oxide with contact holes. Here is an example of a finished sandwich.


This was a fun activity and makes you really think about the three dimensional structure of the CMOS device. Since our class is near supper time this makes a good activity.

Here is a generic CMOS layout:

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Publications by A. Paszternák:

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Organometallic deposition of ultrasmooth nanoscale Ni film,

Zigzag-shaped nickel nanowires via organometallic template-free route

Surface analytical characterization of passive iron surface modified by alkyl-phosphonic acid layers

Atomic Force Microscopy Studies of Alkyl-Phosphonate SAMs on Mica

Amorphous iron formation due to low energy heavy ion implantation in evaporated 57Fe thin films

Surface modification of passive iron by alkylphosphonic acid layers

Formation and structure of alkylphosphonic acid layers on passive iron

Structure of the nonionic surfactant triethoxy monooctylether C8E3 adsorbed at the free water surface, as seen from surface tension measurements and Monte Carlo simulations