Everspin to launch STT-MRAM in 2012, prepares design-in tools support

Everspin is gearing up to introduce their upcoming STT-MRAM products in 2012, and the company announced that they have partnered with Cadence to provide ;memory model verification IP for these products. The new memory models are already available as part of the Cadence Verification IP Catalog. Everspin says they are working with several partners to ensure design-in tools are available as well.

STT-MRAM requires less current to write info into the memory cell, which leads to higher densities. Everspin's current highest-density Toggle-MRAM product is a 16Mb chip, and we expect their STT-MRAM products to be much higher in density, which will open new markets and applications.


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