My research field or area of interest innanotechnology
Leakage Power analysis in Nanometer CMOS technologies considering statistical process variations
Low power methodology, techniques, and strategies for high performance applications
FTFC - Faible Tension Faible Consommation 2008 - “Analytical Modelling of Transistor Leakage Currents in CMOS Nano-Technologies Considering Statistical Process Variations”
ICICDT - International Conference on Integrated Circuits and Design Techniques 2008 - “Statistical Leakage Modeling in CMOS Logic Gates Considering Process Variations”
NANOTECH WCM - Workshop on Compact Modelling 2009 - “PSP Model Equations Extension for Statistical Estimation of Leakage Current in Nanometer CMOS
Technologies Considering Process Variations”
ESSDERC – European Solid-State Device Research Conference 2009 -“An Accurate Approach for Statistical Estimation of Leakage Current Considering Multi-Parameter Process Variations in Nanometer CMOS Technologies”
Researchgroup, Institute, University, School, Company name
Researchgroup, Institute, Company, University, School webpage
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