B Vandana
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B Vandana's Friends

  • S K Mohapatra
  • Dr. Gopalakrishnan. M
 

B Vandana's Page

Latest Activity

B Vandana posted a status
"Thank You Sir"
Nov 13

Full member
S K Mohapatra left a comment for B Vandana
"On behalf of the team, I extend to you a very warm welcome. I hope you enjoy what the forum has to offer and that you are an active member of what will hopefully become a vibrant, informative, entertaining and supporting aspect of our…"
Nov 13
B Vandana and Dr. Gopalakrishnan. M are now friends
Nov 11
B Vandana is now a member of The International NanoScience Community
Nov 6

Profile Information

I am...
Engineer
My research field or area of interest innanotechnology
Semiconductor devices and Nanotechnology
Interest in...
Research in the area of Nano science and technology
Publication list
Study of Floating Body Effect in SOI Technology
B Vandana
International Journal of Modern Engineering Research (IJMER) 3 (3), 1817-1824
Prospects of 2D Junctionless Channel Transistor (JLCT) Towards Analog and RF Metrics Using Si and SiGe in Device Layer
B Vandana, SK Mohapatra, JK Das, BS Patro
Journal of Low Power Electronics 13 (3), 536-544
Perception on Nano Computing and its Application
TMB B Vandana, JK Das, SK Mohapatra
CSI Communications 41 (02), 10-12
Impact on gate oxide material of inverted ‘T’Junctionless FinFET at 22 nm technology node
B Vandana, JK Das, SK Mohapatra, MS Jyothi
Electronics, Materials Engineering and Nano-Technology (IEMENTech), 2017 1st …
Physical insight of junctionless transistor with simulation study of Strained channel
B Vandana, BS Patro, JK Das, SK Mohapatra
ECTI Transactions on Electrical Engineering, Electronics, and Communications …
EXPLORATION TOWARDS ELECTROSTATIC INTEGRITY FOR SIGE ON INSULATOR (SG-OI) ON JUNCTIONLESS CHANNEL TRANSISTOR (JLCT)
B Vandana, JK Das, BS Patro, SK Mohapatra
Facta Universitatis, Series: Electronics and Energetics 30 (3), 383-390
1 GHz High Sensitivity Differential Current Comparator for High Speed ADC
BS Patro, S Biswas, I Roy, B Vandana
Journal of Digital Integrated Circuits in Electrical Devices 2 (1), 7-12
SiGe on Insulator (SG-OI) on Junctionless Channel Transistor (JLCT): A new device for scaling with improved switching action
BV S K Mohapatra, B S Patro, J K Das
2nd International Conference on Micro-electronics, Communication and …
Challenges and Limitations of Low Power Techniques: Low Power Methodologies in
B Vandana, BS Patro
Design and Modeling of Low Power VLSI Systems, 48
A Low Phase Noise Wide Tuning Range CMOS Differential Ring Voltage Controlled Oscillator for Signal Processing
BS Patro, B Vandana, SK Mandal
International Conference on Communication, Circuits and Systems, 13-15
Low Power Strategies for beyond Moore's Law Era: Low Power Device Technologies and Materials
BS Patro, B Vandana
Design and Modeling of Low Power VLSI Systems, 27-47
Researchgroup, Institute, University, School, Company name
KIIT University
Researchgroup, Institute, Company, University, School webpage
http://kiit.ac.in
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Comment Wall (1 comment)

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At 4:25am on November 13, 2017,
Full member
S K Mohapatra
said…

On behalf of the team, I extend to you a very warm welcome. I hope you enjoy what the forum has to offer and that you are an active member of what will hopefully become a vibrant, informative, entertaining and supporting aspect of our community.

Regards

 
 
 

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